Formal Verification of Circuits

Evolutionary Algorithms for VLSI CAD

Advanced Formal Verification

Towards One-Pass Synthesis

Binary Decision Diagrams: Theory and Implementation

Quality-Driven SystemC Design

Robustness and Usability in Modern Design Flows

Towards a Design Flow for Reversible Logic

High Quality Test Pattern Generation and Boolean Satisfiability

Reversible and Quantum Circuits: Optimization and Complexity Analysis

Debugging at the Electronic System Level

Formal Specification Level: Concepts, Methods, and Algorithms

In-Memory Computing: Synthesis and Optimization

Formal and Practical Techniques for the Complex System Design Process using Virtual Prototypes: Better Early than Never

Design for Testability, Debug and Reliability: Next Generation Measures Using Formal Techniques

Automated Analysis of Virtual Prototypes at the Electronic System Level: Design Understanding and Applications

Exact Design of Digital Microfluidic Biochips

Automatic Methods for the Refinement of System Models: From the Specification to the Implementation

Design Automation Techniques for Approximation Circuits: Verification, Synthesis and Test

Formal Verification of Structurally Complex Multipliers